Hardware Architecture and Processing Units for Exact Bayesian Inference with On-line Learning

Case ID:
C14680
Disclosure Date:
3/23/2017
Unmet Need
Machine learning is the field of computer science which involves using statistical techniques which give a computer the ability to “learn” using data without having to be explicitly programmed. In data analytics, machine learning is a method of using complex models and algorithms to make predictions. Commercially, this allows the user to produce reliable results and gain new insights into trends and relationships in the data. Machine learning algorithms help optimize any operation finding the best solution while making better use of the data. In other words Machine Learning algorithms allow for more automated, often better results than other algorithms.
 
Technology Overview
The proposed technology is the combination of a specific probability analysis machine learning algorithm and a multicore processor as an Application Specific Integrated Circuit (ASIC). An ASIC is custom made piece of computer hardware which is made with the intention of running a specific algorithm, so it is more efficient at running the program than a generic piece of hardware. This combination of custom hardware with a high functioning algorithm makes for a high performance, minimum power dissipation product. The architecture is also programmable and allows computation with on demand precision. This product suits the market’s push for better, faster, more efficient machine learning technology. The complimentary relationship between powerful software and custom hardware makes this product novel.
 
Stage of Development
In the published work by the authors, they describe a successful example of using their product for image processing. The trial was able to process 120x160 pixel images at 10 frames per second and allowed the parameters to change and resynthesize. The product ran efficiently as expected. 
 
Publications
Columbus L, Forbes Tech, 2018

 
Patent Information:
Title App Type Country Serial No. Patent No. File Date Issued Date Expire Date Patent Status
HARDWARE ARCHITECTURE AND PROCESSING UNITS FOR EXACT BAYESIAN INFERENCE WITH ON-LINE LEARNING AND METHODS FOR SAME PCT: Patent Cooperation Treaty United States 16/626,589 11,620,556 12/26/2019 4/4/2023 2/20/2040 Granted
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For Information, Contact:
Heather Curran
hpretty2@jhu.edu
410-614-0300
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